It is expected that more domestic chip makers will soon be queuing up to put their top-tier offerings through the rigours of space testing, the team led by Liu Hongjin, of the China Academy of Space Technology, wrote in a peer-reviewed paper published in the Chinese academic journal Spacecraft Environment Engineering in December.
Conducting large-scale chip testing in orbit is a massive and challenging task, but it is crucial for China’s rapidly growing space ambitions.
The scale of this work on Tiangong is much larger than China’s previous testing platforms carried by satellites, according to the team.
During routine supply missions to the space station a large number of confidential new chips for civilian or military use can hitch a ride into space and be installed on the outside of the space station by astronauts for rigorous radiation testing in space.
These chips have to run various software programs and the data generated can be beamed back to Earth through the space station’s powerful communication system. If needed, these chips can be returned to Earth with astronauts for further in-depth testing.
This large-scale testing can rapidly improve the technology and cut research and development costs of China’s space-grade chips, according to Liu and his colleagues from the China Aerospace Science and Technology Corporation. However, they did reveal the manufacturers, design details and performance parameters of the chips.
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This is a benefit of having a completely self-built space station. While the International Space Station (ISS) is larger than the Tiangong and can conduct similar experiments, its rules stipulate that the 15 countries taking part have the right to know detailed information about all payloads sent to the ISS, which would be a problem when chip testing involves national security and technical secrets.
The charter of the ISS also explicitly prohibits experiments related to military technology. In 2017, a Russian cargo spacecraft carrying equipment with an unclear purpose prompted questions from Nato.
According to Liu’s paper, Chinese aerospace engineers have been caught in a paradox of progressiveness and caution.
They eagerly adopt advancements such as artificial intelligence, hungry for the heightened processing power it demands for new space applications. However, as the number of transistors on chips increases, they become more vulnerable to attacks from cosmic high-energy particles. This phenomenon, known as a “single-event upset”, can affect the accuracy of computing and information storage.
Liu said China aimed to develop a diverse range of high-performance chips that could maintain stable and reliable operation in orbit for extended periods.
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Scientists anticipate potential challenges such as single-event upset with a combination of radiation-hardened design, optimised layouts and enhanced quality.
Yet, as Liu’s team attests, the radiation of space cannot be wholly replicated on Earth. Occasionally, a rogue high-energy particle breaches multiple layers of defence, striking a transistor at an unforeseen angle. It might occur every few months or several times a day, posing a daunting task for chip designers.
Large-scale testing on the space station would help China develop advanced protection technologies and allow as many suppliers as possible to compete on an equal platform, rather than selecting suppliers first and then testing their chips, the researchers said.
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China’s new generation of space chips is mainly produced using mature processes ranging from 28 to 16 nanometres. China has a large number of deep ultraviolet lithography machines, enabling it to produce a significant quantity of the chips at low costs.
Some Chinese space experts believe that in the coming years there will be an explosive demand worldwide for high-performance, low-cost space-grade chips.
